verilator

Converts Verilog and SystemVerilog hardware description language (HDL) design into a C++ or SystemC model to be executed after compiling. More information: <https://veripool.org/guide/latest/>.

Debian Debian
RUN apt-get update && \ apt-get install -y verilator
Ubuntu
RUN apt-get update && \ apt-get install -y verilator
Arch Arch Linux
RUN pacman -S --noconfirm verilator
image/svg+xml Kali Linux
RUN apt-get update && \ apt-get install -y verilator
Fedora
RUN dnf install -y verilator
Raspbian
RUN apt-get update && \ apt-get install -y verilator
click the source code to copy install verilator on any operating system with command-not-found.com